This disclosure relates to three-dimensional (3D) integrated circuits. In particular, it relates to power delivery in 3D integrated circuits using multiple supply voltages. Three dimensional (3D) chips offer hardware developers the ability to arrange memory in a compact design. Due to this compactness, 3D chips offer several advantages over traditional 2D chips, such as reduced voltage variation, non-uniform die configurations, and reduced pin count. 3D chips also offer some obstacles, such as power supply noise. Power can delivered to 3D chip components by microconnects, such as inductive solder bumps, between dies and by through-silicon-vias (TSVs) within dies.